Boundary Scan Testing (JTAG IEEE 1149.1)

In acknowledgment of superior technical capability and advanced application expertise in Boundary-Scan Testing and In-System Programming, ACD has been recognized as an Authorized Applications Partner of JTAG Technologies Inc.

With the addition of JTAG Technologies, Inc. Boundary Scan Test tools, ACD is now offering our customers full JTAG consultation and test coverage for designs that employ Boundary Scan components. In addition to Boundary Scan Testing, ACD also offers In-System programming of Programmable Logic Devices such as FPGA’s and Flash memories.

Benefits of Boundary Scan Design

Today’s designs, which increasingly employ large pin count Ball-Grid-Array and micro-BGA components, create challenges to produce a printed circuit board with adequate test points. If the designer is successful, then the test engineer is faced with the task of creating a bed-of-nails fixture that will adequately probe the thousands of possible test points. Even if the fixture can be created, management must deal with the fact that the cost of such test fixtures will easily exceed tens of thousands of dollars. Thus the cost of test may have serious impact on the profit margin for the project.

Fortunately there is a technology that overcomes these problems: “Boundary Scan Components (JTAG IEEE 1149.1)”.  Designs can employ the greatest densities without worrying about test coverage.  Test engineering no longer has to worry about creating multi-thousand probe bed-of-nails test fixtures.  Management no longer has to worry about budgeting for the cost of expensive test fixtures. The solution is to employ “Boundary Scan Testing” in the design.  For more information on Boundary Scan, visit www.jtag.com.

ACD Boundary Scan Consultation/Testing Services

ACD is pleased to announce the addition of JTAG Technologies test tools which enable us to provide our customers with full JTAG testing and In-System programming.

ACD now provides:

	Consultation during the design and layout phase of any design to aid the customer in the efficient use of the Boundary Scan chain(s). This includes an analysis of the test coverage provided by the inclusion of Boundary Scan components.
	Boundary Scan Test programming that includes the testing of the Boundary Scan chain infrastructure, the Boundary Scan Interconnect, accessible logic clusters and memories.
	In-System Programming of programmable logic devices.
	Complete Boundary Scan testing after assembly. Thus providing the customer with highly reliable product that can be quickly verified and integrated into the systems for sale.

Typical Test Program Input Criteria

To begin the consultation/test programming process ACD requires the following items from the customer:

	Latest Design Schematic
	Latest Design Net List
	Accurate and Complete Bill-Of-Materials
	Boundary Scan Device Logic files (BSDL) for all Boundary Scan components in the design.